Board diagnostic using ABI IC Tester, replace BGA Chip using PDR Rework Station, and IC being re-program using Xeltek Atmel Avr Programmer

 

 

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ABI Electronics - JTAGMaster

Boundary Scan Tester and In-System Programmer

 

The ABI JTAGMaster is a complete and powerful solution for the testing, faultfinding and programming of complex PCB assemblies with JTAG devices. Driven by the versatile AIM software, the JTAGMaster can also be integrated into existing setups. With direct applications in sectors including Research & Development, Manufacturing and Test & Repair, the JTAGMaster is an invaluable tool giving you increased confidence in your hardware.

 

  • Improve Field Support
  • Reduce Time to Market
  • Increase Production Yield
  • Improve Quality Assurance
  • Lower Manufacturing Costs
  • Decrease Debug Time Scales
  • Reduce Investment Expenditure

 

What is the JTAGMaster?

With older technologies, in-circuit testing is carried out by accessing the pins of a device directly, usually using test clips. But with recent developments in electronics, most PCB assemblies are highly populated and do not allow access to the pins of a device, as is the case in BGA packages for instance. The JTAGMaster gives you access to these devices that are bound to a JTAG chain with the purpose of carrying out testing, fault-finding and even programming operations. Boundary scan (or JTAG) is a widely recognised protocol implemented in most modern Programmable Logic Devices (eg CPLDs, FPGAs) and requires minimal hardware interface.

 

Where is JTAGMaster being use?

  • Field Service Engineering
  • Production Engineering
  • Design Engineering
  • End of Line Testing
  • Test Engineering

 

JTAGMaster - Quick and easy boundary scan testing

The JTAGMaster is aimed at the diagnosis and debugging of complex PCB assemblies containing single or multiple embedded devices. Using the boundary scan test protocol, pins of each device can be individually and safely monitored to determine their functionality. This operation can be carried out on static or active boards over a pre-defined period of time.

 

Information from a board can be stored and recalled by any user for simple verification of the device(s) on a chain (with pass/fail results) or deeper investigation using the graphical viewer and zoom features. Analysing this information can lead to the detection of :

  • Manufacturing defects (eg. open circuit/shorted pins)
  • Logic errors (eg. pin failing to toggle/ faulty device)
  • Programme errors (eg. incorrect/corrupted program)
  • Faults in external circuitry (eg. missing or stuck input signal)

 

Automatic Functionality

Various automatic functions and access levels are available with JTAGMaster :

  • Automatic Chain Detection reduces the time consuming process of identifying devices.
  • Automatic Training lets the software learn the status of the board by itself although manual intervention is also possible.
  • Automatic Data Comparison for quick evaluation with pass or fail results.
  • TestFlow Manager for easy to follow test sequences with data capture and report facility.

 

EXTEST Mode
This mode of testing, supported by the JTAGMaster, allows users to gain control of the pins of devices on the chain. The state of individual pins can be changed between output high or low and the resulting effect can be traced and monitored on other pins. The effect of changing pin states may be checked on the same device or on other devices on the chain. It may also be traced on components outside of the chain, using an instrument such as the CircuitMaster 4000M for instance.

In-system programming (ISP) is provided with the JTAGMaster which uses the JTAG interface to send programming and testing instructions to the device on the board. The JTAGMaster supports all the devices released by Altera, Xilinx, Lattice, Cypress, Atmel and all other manufacturers of devices that can be configured insystem using boundary scan (JTAG). The JTAGMaster supports the file formats used as industry standards by PLD suppliers such as SVF (Serial Vector Format) and JAM STAPL (Standard Test and Programming Language).

 

Integration with your existing system

The programming capabilities of the JTAGMaster can be easily transferred to an existing setup for seamless and central operation. Individual programming applications can be called up using a standard command line tool.

 

SPI, I2C and Microwire programming

The JTAGMaster unit is also capable of programming EEPROM devices using external adapters. Standard binary files are supported and can also be modified in the device buffer window. A wide range of EEPROM devices are present in the library which can be easily updated by users. The signals and power connections are automatically mapped by the software depending on the protocol used:

  • Serial Peripheral Interface (SPI)
  • Inter-Integrated Circuit (I2C)
  • Microwire (μWire)

 

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